[bootlin/training-materials updates] master: Architectures supported by gcc: stop trying to be exhaustive (5226289b)

Michael Opdenacker michael.opdenacker at bootlin.com
Mon Mar 8 10:57:50 CET 2021


Repository : https://github.com/bootlin/training-materials
On branch  : master
Link       : https://github.com/bootlin/training-materials/commit/5226289b7e070598c68aac05e07fd25d21d9a621

>---------------------------------------------------------------

commit 5226289b7e070598c68aac05e07fd25d21d9a621
Author: Michael Opdenacker <michael.opdenacker at bootlin.com>
Date:   Mon Mar 8 10:57:50 2021 +0100

    Architectures supported by gcc: stop trying to be exhaustive
    
    Signed-off-by: Michael Opdenacker <michael.opdenacker at bootlin.com>


>---------------------------------------------------------------

5226289b7e070598c68aac05e07fd25d21d9a621
 slides/sysdev-toolchains-definition/sysdev-toolchains-definition.tex | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/slides/sysdev-toolchains-definition/sysdev-toolchains-definition.tex b/slides/sysdev-toolchains-definition/sysdev-toolchains-definition.tex
index 026c0ad2..e589a51d 100644
--- a/slides/sysdev-toolchains-definition/sysdev-toolchains-definition.tex
+++ b/slides/sysdev-toolchains-definition/sysdev-toolchains-definition.tex
@@ -159,8 +159,7 @@ struct stat {
     \item \url{https://gcc.gnu.org/}
     \item Can compile C, C++, Ada, Fortran, Java, Objective-C,
       Objective-C++, Go, etc. Can generate code for a large number of CPU
-      architectures, including ARM, AVR, Blackfin, CRIS, FRV, M32, MIPS,
-      MN10300, PowerPC, SH, v850, x86, x86\_64, IA64, Xtensa, etc.
+      architectures, including x86, ARM, RISC-V, and many others.
     \item Available under the GPL license, libraries under the GPL with
       linking exception.
     \item Alternative: Clang / LLVM compiler (\url{https://clang.llvm.org/})




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